phyCORE AM335AM335x ZCZ
PinNameDesign Signal Pad Name15 x 15 BGAMode 0Mode 1Mode 2Mode 3Mode 4Mode 5Mode 6Mode 7
X1.A1X_RMII1_RXER/_MCASP1_FSXJ15gmii1_rxerJ15gmii1_rxerrmii1_rxerspi1_d1_mux1I2C1_SCL_mux0mcasp1_fsx_mux1uart5_rtsn_mux2uart2_txd_mux1gpio3[2]
X1.A10X_RMII1_TXEN/_MCASP1_AXR0J16gmii1_txenJ16gmii1_txenrmii1_txenrgmii1_tctltimer4_mux0mcasp1_axr0_mux1eQEP0_index_mux1mmc2_cmd_mux2gpio3[3]
X1.A11X_RMII1_TXD0/_GPIO0_28K17gmii1_txd0K17gmii1_txd0rmii1_txd0rgmii1_td0mcasp1_axr2_mux0mcasp1_aclkr_mux0eQEP0B_in_mux1mmc1_clk_mux1gpio0[28]
X1.A13X_RMII1_TXD1/_GPIO0_21K16gmii1_txd1K16gmii1_txd1rmii1_txd1rgmii1_td1mcasp1_fsr_mux1mcasp1_axr1_mux0eQEP0A_in_mux1mmc1_cmd_mux1gpio0[21]
X1.A14X_MII1_COL/MCASP1_AXR2H16gmii1_colH16gmii1_colrmii2_refclkspi1_sclk_mux1uart5_rxd_mux0mcasp1_axr2_mux1mmc2_dat3_mux2mcasp0_axr2_mux4gpio3[0]
X1.A15X_RMII1_CRS/_MCASP1_ACLKXH17gmii1_crsH17gmii1_crsrmii1_crs_dvspi1_d0_mux1I2C1_SDA_mux0mcasp1_aclkx_mux1uart5_ctsn_mux2uart2_rxd_mux1gpio3[1]
X1.A16X_GPMC_AD1V7gpmc_ad1V7gpmc_ad1mmc1_dat1_mux2gpio1[1]
X1.A23X_GPMC_AD0U7gpmc_ad0U7gpmc_ad0mmc1_dat0_mux2gpio1[0]
X1.A24X_GPMC_AD2R8gpmc_ad2R8gpmc_ad2mmc1_dat2_mux2gpio1[2]
X1.A25X_GPMC_AD4U8gpmc_ad4U8gpmc_ad4mmc1_dat4_mux2gpio1[4]
X1.A26X_GPMC_AD5V8gpmc_ad5V8gpmc_ad5mmc1_dat5_mux2gpio1[5]
X1.A28X_GPMC_AD3T8gpmc_ad3T8gpmc_ad3mmc1_dat3_mux2gpio1[3]
X1.A29X_GPMC_AD6R9gpmc_ad6R9gpmc_ad6mmc1_dat6_mux2gpio1[6]
X1.A3X_RMII1_RXD0/_GPIO2_21M16gmii1_rxd0M16gmii1_rxd0rmii1_rxd0rgmii1_rd0mcasp1_ahclkx_mux0mcasp1_ahclkr_mux0mcasp1_aclkr_mux1mcasp0_axr3_mux4gpio2[21]
X1.A30X_GPMC_AD7T9gpmc_ad7T9gpmc_ad7mmc1_dat7_mux2gpio1[7]
X1.A33X_GPMC_ADVn_ALER7gpmc_advn_aleR7gpmc_advn_aletimer4_mux3gpio2[2]
X1.A34X_GPMC_BE0n_CLET6gpmc_be0n_cleT6gpmc_be0n_cletimer5_mux3gpio2[5]
X1.A35X_RGMII2_RCTL/_MMC2_DAT0/_P_MII1_TXD3V14gpmc_a1V14gpmc_a1_mux0gmii2_rxdvrgmii2_rctlmmc2_dat0_mux0gpmc_a17_mux0pr1_mii1_txd3ehrpwm0_synco_mux1gpio1[17]
X1.A36X_RGMII2_TD3/_MMC2_DAT1/_P_MII1_TXD2U14gpmc_a2U14gpmc_a2_mux0gmii2_txd3rgmii2_td3mmc2_dat1_mux0gpmc_a18_mux0pr1_mii1_txd2ehrpwm1A_mux1gpio1[18]
X1.A39X_RGMII2_TD2/_MMC2_DAT2/_P_MII1_TXD1T14gpmc_a3T14gpmc_a3_mux0gmii2_txd2rgmii2_td2mmc2_dat2_mux0gpmc_a19_mux0pr1_mii1_txd1ehrpwm1B_mux1gpio1[19]
X1.A4X_RMII1_RXD1/_GPIO2_20L15gmii1_rxd1L15gmii1_rxd1rmii1_rxd1rgmii1_rd1mcasp1_axr3_mux0mcasp1_fsr_mux0eQEP0_strobe_mux1mmc2_clk_mux2gpio2[20]
X1.A40X_RGMII2_TD0/_P_MII1_RXD3V15gpmc_a5V15gpmc_a5_mux0gmii2_txd0rgmii2_td0rmii2_txd0gpmc_a21_mux0pr1_mii1_rxd3eQEP1B_in_mux1gpio1[21]
X1.A43X_RGMII2_RCLK/_MMC2_DAT5/_P_MII1_RXD1T15gpmc_a7T15gpmc_a7_mux0gmii2_rxclkrgmii2_rclkmmc2_dat5_mux0gpmc_a23_mux0pr1_mii1_rxd1eQEP1_strobe_mux1gpio1[23]
X1.A44X_RGMII2_RD2/_MMC2_DAT7/_P_MII1_MR1_CLKU16gpmc_a9U16gpmc_a9_mux0gmii2_rxd2rgmii2_rd2mmc2_dat7_mux0gpmc_a25_mux0pr1_mii_mr1_clkmcasp0_fsx_mux3gpio1[25]
X1.A45X_RGMII2_RD1/_P_MII1_RXDVT16gpmc_a10T16gpmc_a10_mux0gmii2_rxd1rgmii2_rd1rmii2_rxd1gpmc_a26_mux0pr1_mii1_rxdvmcasp0_axr0_mux3gpio1[26]
X1.A46X_RGMII2_RD0/_P_MII1_RXERV17gpmc_a11V17gpmc_a11_mux0gmii2_rxd0rgmii2_rd0rmii2_rxd0gpmc_a27_mux0pr1_mii1_rxermcasp0_axr1_mux3gpio1[27]
X1.A48X_MMC2_CLK/_P_MDIO_MDCLKV12gpmc_clkV12gpmc_clk_mux0lcd_memory_clk_mux0gpmc_wait1mmc2_clk_mux0pr1_mii1_crs_mux0pr1_mdio_mdclkmcasp0_fsr_mux3gpio2[1]
X1.A8X_UART3_RXL17gmii1_rxd3L17gmii1_rxd3uart3_rxd_mux0rgmii1_rd3mmc0_dat5mmc1_dat2_mux1uart1_dtrn_mux0mcasp0_axr0_mux2gpio2[18]
X1.A9X_UART3_TXL16gmii1_rxd2L16gmii1_rxd2uart3_txd_mux0rgmii1_rd2mmc0_dat4mmc1_dat3_mux1uart1_rin_mux0mcasp0_axr1_mux2gpio2[19]
X1.B10X_TDOA11TDOA11TDO
X1.B11X_TRSTnB10nTRSTB10nTRST
X1.B12X_TMSC11TMSC11TMS
X1.B15X_INTR1D14xdma_event_intr1D14xdma_event_intr1tclkinclkout2timer7_mux1pr1_pru0_pru_r31[16]EMU3_mux0gpio0[20]
X1.B17X_GPMC_WEnU6gpmc_wenU6gpmc_wentimer6_mux3gpio2[4]
X1.B18X_GPIO3_8B14EMU1B14EMU1gpio3[8]
X1.B2X_MDIO_DATAM17mdio_dataM17mdio_datatimer6_mux2uart5_rxd_mux3uart3_ctsn_mux2mmc0_sdcd_mux2mmc1_cmd_mux2mmc2_cmd_mux1gpio0[0]
X1.B20X_GPIO3_7C14EMU0C14EMU0gpio3[7]
X1.B21X_GPMC_CS0nV6gpmc_csn0V6gpmc_csn0gpio1[29]
X1.B22X_GPMC_OEn_REnT7gpmc_oen_renT7gpmc_oen_rentimer7_mux3gpio2[3]
X1.B26X_LCD_D21T11gpmc_ad10T11gpmc_ad10lcd_data21mmc1_dat2_mux0mmc2_dat6_mux1ehrpwm2_tripzone_input_mux1pr1_mii0_txen_mux0gpio0[26]
X1.B27X_LCD_D23U10gpmc_ad8U10gpmc_ad8lcd_data23mmc1_dat0_mux0mmc2_dat4_mux1ehrpwm2A_mux1pr1_mii_mt0_clk_mux0gpio0[22]
X1.B28X_LCD_D22/_P_MII0_COLT10gpmc_ad9T10gpmc_ad9lcd_data22mmc1_dat1_mux0mmc2_dat5_mux1ehrpwm2B_mux1pr1_mii0_colgpio0[23]
X1.B3X_MDIO_CLKM18mdio_clkM18mdio_clktimer5_mux2uart5_txd_mux3uart3_rtsn_mux2mmc0_sdwp_mux2mmc1_clk_mux2mmc2_clk_mux1gpio0[1]
X1.B30X_LCD_D20U12gpmc_ad11U12gpmc_ad11lcd_data20mmc1_dat3_mux0mmc2_dat7_mux1ehrpwm0_synco_mux1pr1_mii0_txd3_mux0gpio0[27]
X1.B31X_LCD_D19T12gpmc_ad12T12gpmc_ad12lcd_data19mmc1_dat4_mux0mmc2_dat0_mux1eQEP2A_in_mux1pr1_mii0_txd2_mux0pr1_pru0_pru_r30[14]gpio1[12]
X1.B32X_LCD_D18R12gpmc_ad13R12gpmc_ad13lcd_data18mmc1_dat5_mux0mmc2_dat1_mux1eQEP2B_in_mux1pr1_mii0_txd1_mux0pr1_pru0_pru_r30[15]gpio1[13]
X1.B33X_P_MII1_TXENU17gpmc_wpnU17gpmc_wpngmii2_rxergpmc_csn5rmii2_rxermmc2_sdcd_mux0pr1_mii1_txenuart4_txd_mux2gpio0[31]
X1.B36X_LCD_D16U13gpmc_ad15U13gpmc_ad15lcd_data16mmc1_dat7_mux0mmc2_dat3_mux1eQEP2_strobe_mux1pr1_ecap0_ecap_capin_apwm_o_mux0pr1_pru0_pru_r31[15]gpio1[15]
X1.B37X_RGMII2_INT/_MMC2_DAT3/_P_MII1_RXLINKU18gpmc_be1nU18gpmc_be1n_mux0gmii2_colgpmc_csn6mmc2_dat3_mux0gpmc_dirpr1_mii1_rxlinkmcasp0_aclkr_mux3gpio1[28]
X1.B38X_LCD_D17V13gpmc_ad14V13gpmc_ad14lcd_data17mmc1_dat6_mux0mmc2_dat2_mux1eQEP2_index_mux1pr1_mii0_txd0_mux0pr1_pru0_pru_r31[14]gpio1[14]
X1.B40X_RGMII2_RD3/_MMC2_DAT6/_P_MII1_RXD0V16gpmc_a8V16gpmc_a8_mux0gmii2_rxd3rgmii2_rd3mmc2_dat6_mux0gpmc_a24_mux0pr1_mii1_rxd0mcasp0_aclkx_mux3gpio1[24]
X1.B41X_RGMII2_TD1/_P_MII1_TXD0R14gpmc_a4R14gpmc_a4_mux0gmii2_txd1rgmii2_td1rmii2_txd1gpmc_a20_mux0pr1_mii1_txd0eQEP1A_in_mux1gpio1[20]
X1.B42X_RGMII2_TCTL/_P_MII1_MT_CLKR13gpmc_a0R13gpmc_a0_mux0gmii2_txenrgmii2_tctlrmii2_txengpmc_a16_mux0pr1_mii_mt1_clkehrpwm1_tripzone_input_mux1gpio1[16]
X1.B46X_MMC2_CMD/_P_MDIO_DATAT13gpmc_csn3T13gpmc_csn3mmc2_cmd_mux0pr1_mii0_crs_mux0pr1_mdio_dataEMU4_mux0gpio2[0]
X1.B47X_GPIO1_30U9gpmc_csn1U9gpmc_csn1gpmc_clk_mux1mmc1_clk_mux0pr1_edio_data_in6_mux0pr1_edio_data_out6_mux0pr1_pru1_pru_r30[12]pr1_pru1_pru_r31[12]gpio1[30]
X1.B48X_GPIO1_31V9gpmc_csn2V9gpmc_csn2gpmc_be1n_mux1mmc1_cmd_mux0pr1_edio_data_in7_mux0pr1_edio_data_out7_mux0pr1_pru1_pru_r30[13]pr1_pru1_pru_r31[13]gpio1[31]
X1.B5X_GPIO3_18B12mcasp0_aclkrB12mcasp0_aclkr_mux0eQEP0A_in_mux0mcasp0_axr2_mux1mcasp1_aclkx_mux2mmc0_sdwp_mux1pr1_pru0_pru_r30[4]pr1_pru0_pru_r31[4]gpio3[18]
X1.B6X_MII1_RCTL/_GPIO3_4J17gmii1_rxdvJ17gmii1_rxdvlcd_memory_clk_mux1rgmii1_rctluart5_txd_mux1mcasp1_aclkx_mux0mmc2_dat0_mux2mcasp0_aclkr_mux2gpio3[4]
X1.B7X_TDIB11TDIB11TDI
X1.B8X_TCKA12TCKA12TCK
X3.A17X_SPI0_CS0A16spi0_cs0A16spi0_cs0mmc2_sdwp_mux0I2C1_SCL_mux3ehrpwm0_synci_mux1pr1_uart0_txd_mux0pr1_edio_data_in1pr1_edio_data_out1gpio0[5]
X3.A18X_MMC0_SDCDC15spi0_cs1C15spi0_cs1uart3_rxd_mux1eCAP1_in_PWM1_out_mux0mmc0_pow_mux1xdma_event_intr2_mux1mmc0_sdcd_mux0EMU4_mux1gpio0[6]
X3.A19X_I2C0_SCLC16I2C0_SCLC16I2C0_SCLtimer7_mux2uart2_rtsn_mux0eCAP1_in_PWM1_out_mux2gpio3[6]
X3.A20X_I2C0_SDAC17I2C0_SDAC17I2C0_SDAtimer4_mux2uart2_ctsn_mux0eCAP2_in_PWM2_out_mux2gpio3[5]
X3.A22X_MCASP0_AXR0D12mcasp0_axr0D12mcasp0_axr0_mux0ehrpwm0_tripzone_input_mux0spi1_d1_mux2mmc2_sdcd_mux1pr1_pru0_pru_r30[2]pr1_pru0_pru_r31[2]gpio3[16]
X3.A23X_GPIO3_17C12mcasp0_ahclkrC12mcasp0_ahclkr_mux0ehrpwm0_synci_mux0mcasp0_axr2_mux0spi1_cs0_mux4eCAP2_in_PWM2_out_mux1pr1_pru0_pru_r30[3]pr1_pru0_pru_r31[3]gpio3[17]
X3.A24X_DCAN0_RXK15gmii1_txd2K15gmii1_txd2dcan0_rx_mux0rgmii1_td2uart4_txd_mux0mcasp1_axr0_mux0mmc2_dat2_mux2mcasp0_ahclkx_mux2gpio0[17]
X3.A25X_DCAN0_TXJ18gmii1_txd3J18gmii1_txd3dcan0_tx_mux0rgmii1_td3uart4_rxd_mux0mcasp1_fsx_mux0mmc2_dat1_mux2mcasp0_fsr_mux2gpio0[16]
X3.A27X_MCASP0_AHCLKXA14mcasp0_ahclkxA14mcasp0_ahclkx_mux0eQEP0_strobe_mux0mcasp0_axr3_mux0mcasp1_axr1_mux1EMU4_mux2pr1_pru0_pru_r30[7]pr1_pru0_pru_r31[7]gpio3[21]
X3.A28X_MCASP0_AXR1D13mcasp0_axr1D13mcasp0_axr1_mux0eQEP0_index_mux0mcasp1_axr0_mux2EMU3_mux2pr1_pru0_pru_r30[6]pr1_pru0_pru_r31[6]gpio3[20]
X3.A29X_MCASP0_FSXB13mcasp0_fsxB13mcasp0_fsx_mux0ehrpwm0B_mux0spi1_d0_mux2mmc1_sdcd_mux1pr1_pru0_pru_r30[1]pr1_pru0_pru_r31[1]gpio3[15]
X3.A30X_PORZB15porzB15porz
X3.A32X_UART0_TXDE16uart0_txdE16uart0_txdspi1_cs1_mux3dcan0_rx_mux1I2C2_SCL_mux1eCAP1_in_PWM1_out_mux1pr1_pru1_pru_r30[15]pr1_pru1_pru_r31[15]gpio1[11]
X3.A33X_UART0_RXDE15uart0_rxdE15uart0_rxdspi1_cs0_mux3dcan0_tx_mux1I2C2_SDA_mux1eCAP2_in_PWM2_out_mux0pr1_pru1_pru_r30[14]pr1_pru1_pru_r31[14]gpio1[10]
X3.A34X_SPI0_D0B17spi0_d0B17spi0_d0uart2_txd_mux3I2C2_SCL_mux2ehrpwm0B_mux1pr1_uart0_rts_n_mux0pr1_edio_latch_inEMU3_mux1gpio0[3]
X3.A35X_SPI0_D1B16spi0_d1B16spi0_d1mmc1_sdwp_mux0I2C1_SDA_mux3ehrpwm0_tripzone_input_mux1pr1_uart0_rxd_mux0pr1_edio_data_in0pr1_edio_data_out0gpio0[4]
X3.A37X_LCD_D3/_P_MII0_TXD2R4lcd_data3R4lcd_data3gpmc_a3_mux1pr1_mii0_txd2_mux1ehrpwm0_synco_mux0pr1_pru1_pru_r30[3]pr1_pru1_pru_r31[3]gpio2[9]
X3.A38X_LCD_D2/_P_MII0_TXD3R3lcd_data2R3lcd_data2gpmc_a2_mux1pr1_mii0_txd3_mux1ehrpwm2_tripzone_input_mux0pr1_pru1_pru_r30[2]pr1_pru1_pru_r31[2]gpio2[8]
X3.A39X_LCD_D4/_P_MII0_TXD1T1lcd_data4T1lcd_data4gpmc_a4_mux1pr1_mii0_txd1_mux1eQEP2A_in_mux0pr1_pru1_pru_r30[4]pr1_pru1_pru_r31[4]gpio2[10]
X3.A40X_LCD_D5/_P_MII0_TXD0T2lcd_data5T2lcd_data5gpmc_a5_mux1pr1_mii0_txd0_mux1eQEP2B_in_mux0pr1_pru1_pru_r30[5]pr1_pru1_pru_r31[5]gpio2[11]
X3.A42X_LCD_D0/_P_MII0_MT_CLKR1lcd_data0R1lcd_data0gpmc_a0_mux1pr1_mii_mt0_clk_mux1ehrpwm2A_mux0pr1_pru1_pru_r30[0]pr1_pru1_pru_r31[0]gpio2[6]
X3.A43X_LCD_D1/_P_MII0_TXENR2lcd_data1R2lcd_data1gpmc_a1_mux1pr1_mii0_txen_mux1ehrpwm2B_mux0pr1_pru1_pru_r30[1]pr1_pru1_pru_r31[1]gpio2[7]
X3.A44X_LCD_D13/_P_MII0_RXERV3lcd_data13V3lcd_data13gpmc_a17_mux1eQEP1B_in_mux0mcasp0_fsr_mux1mcasp0_axr3_mux3pr1_mii0_rxeruart4_rtsn_mux1gpio0[9]
X3.A45X_LCD_HSYNCR5lcd_hsyncR5lcd_hsyncgpmc_a9_mux1pr1_edio_data_in3pr1_edio_data_out3pr1_pru1_pru_r30[9]pr1_pru1_pru_r31[9]gpio2[23]
X3.A47X_USB0_DMN18USB0_DMN18USB0_DM
X3.A48X_USB0_DPN17USB0_DPN17USB0_DP
X3.A49X_LCD_D12/_P_MII0_RXLINKV2lcd_data12V2lcd_data12gpmc_a16_mux1eQEP1A_in_mux0mcasp0_aclkr_mux1mcasp0_axr2_mux3pr1_mii0_rxlinkuart4_ctsn_mux1gpio0[8]
X3.A5X_AM335_NMInB18nNMIB18nNMI
X3.A50X_LCD_AC_BIAS_EN_/P_MII1_CRSR6lcd_ac_bias_enR6lcd_ac_bias_engpmc_a11_mux1pr1_mii1_crs_mux1pr1_edio_data_in5pr1_edio_data_out5pr1_pru1_pru_r30[11]pr1_pru1_pru_r31[11]gpio2[25]
X3.A52X_LCD_D8/_P_MII0_RXD3U1lcd_data8U1lcd_data8gpmc_a12_mux0ehrpwm1_tripzone_input_mux0mcasp0_aclkx_mux1uart5_txd_mux2pr1_mii0_rxd3uart2_ctsn_mux1gpio2[14]
X3.A53X_LCD_D14/_P_MII0_MR_CLKV4lcd_data14V4lcd_data14gpmc_a18_mux1eQEP1_index_mux0mcasp0_axr1_mux1uart5_rxd_mux1pr1_mii_mr0_clkuart5_ctsn_mux1gpio0[10]
X3.A54X_LCD_D15/_P_MII0_RXDVT5lcd_data15T5lcd_data15gpmc_a19_mux1eQEP1_strobe_mux0mcasp0_ahclkx_mux1mcasp0_axr3_mux2pr1_mii0_rxdvuart5_rtsn_mux1gpio0[11]
X3.A55X_LCD_D6T3lcd_data6T3lcd_data6gpmc_a6_mux1pr1_edio_data_in6_mux1eQEP2_index_mux0pr1_edio_data_out6_mux1pr1_pru1_pru_r30[6]pr1_pru1_pru_r31[6]gpio2[12]
X3.A57X_LCD_D7T4lcd_data7T4lcd_data7gpmc_a7_mux1pr1_edio_data_in7_mux1eQEP2_strobe_mux0pr1_edio_data_out7_mux1pr1_pru1_pru_r30[7]pr1_pru1_pru_r31[7]gpio2[13]
X3.A58X_LCD_D9/_P_MII0_RXD2U2lcd_data9U2lcd_data9gpmc_a13_mux0ehrpwm0_synco_mux0mcasp0_fsx_mux1uart5_rxd_mux2pr1_mii0_rxd2uart2_rtsn_mux1gpio2[15]
X3.A59X_LCD_D10/_P_MII0_RXD1U3lcd_data10U3lcd_data10gpmc_a14_mux0ehrpwm1A_mux0mcasp0_axr0_mux1pr1_mii0_rxd1uart3_ctsn_mux1gpio2[16]
X3.A60X_UART2_RXK18gmii1_txclkK18gmii1_txclkuart2_rxd_mux0rgmii1_tclkmmc0_dat7mmc1_dat0_mux1uart1_dcdn_mux0mcasp0_aclkx_mux2gpio3[9]
X3.B10X_UART1_TXD/_P_UART0_TXDD15uart1_txdD15uart1_txdmmc2_sdwp_mux1dcan1_rx_mux1I2C1_SCL_mux2pr1_uart0_txd_mux1pr1_pru0_pru_r31[16]gpio0[15]
X3.B11X_UART1_RXD/_P_UART0_RXDD16uart1_rxdD16uart1_rxdmmc1_sdwp_mux1dcan1_tx_mux1I2C1_SDA_mux2pr1_uart0_rxd_mux1pr1_pru1_pru_r31[16]gpio0[14]
X3.B13X_RESET_OUTnA10nRESETIN_OUTA10nRESETIN_OUT
X3.B15X_GPIO_3_19C13mcasp0_fsrC13mcasp0_fsr_mux0eQEP0B_in_mux0mcasp0_axr3_mux1mcasp1_fsx_mux2EMU2_mux2pr1_pru0_pru_r30[5]pr1_pru0_pru_r31[5]gpio3[19]
X3.B16X_MCASP0_ACLKXA13mcasp0_aclkxA13mcasp0_aclkx_mux0ehrpwm0A_mux0spi1_sclk_mux2mmc0_sdcd_mux1pr1_pru0_pru_r30[0]pr1_pru0_pru_r31[0]gpio3[14]
X3.B18X_USB1_DPR17USB1_DPR17USB1_DP
X3.B19X_USB1_DMR18USB1_DMR18USB1_DM
X3.B21X_USB1_DRVVBUSF15USB1_DRVVBUSF15USB1_DRVVBUSgpio3[13]
X3.B23X_USB1_IDP17USB1_IDP17USB1_ID
X3.B24X_USB1_CEP18USB1_CEP18USB1_CE
X3.B26X_ECAP0_IN_PWM0_OUTC18eCAP0_in_PWM0_outC18eCAP0_in_PWM0_outuart3_txd_mux1spi1_cs1_mux1pr1_ecap0_ecap_capin_apwm_o_mux1spi1_sclk_mux0mmc0_sdwp_mux0xdma_event_intr2_mux2gpio0[7]
X3.B28X_AIN7C9AIN7C9AIN7
X3.B29X_AIN6A8AIN6A8AIN6
X3.B31X_AIN5B8AIN5B8AIN5
X3.B32X_AIN4C8AIN4C8AIN4
X3.B34X_AIN2B7AIN2B7AIN2
X3.B35X_AIN3A7AIN3A7AIN3
X3.B37X_AIN1C7AIN1C7AIN1
X3.B38X_AIN0B6AIN0B6AIN0
X3.B39X_AM335_EXT_WAKEUPC5EXT_WAKEUPC5EXT_WAKEUP
X3.B42X_USB0_DRVVBUSF16USB0_DRVVBUSF16USB0_DRVVBUSgpio0[18]
X3.B43X_USB0_IDP16USB0_IDP16USB0_ID
X3.B44X_USB0_CEM15USB0_CEM15USB0_CE
X3.B47X_LCD_VSYNCU5lcd_vsyncU5lcd_vsyncgpmc_a8_mux1pr1_edio_data_in2pr1_edio_data_out2pr1_pru1_pru_r30[8]pr1_pru1_pru_r31[8]gpio2[22]
X3.B49X_LCD_D11/_P_MII0_RXD0U4lcd_data11U4lcd_data11gpmc_a15_mux0ehrpwm1B_mux0mcasp0_ahclkr_mux1mcasp0_axr2_mux2pr1_mii0_rxd0uart3_rtsn_mux1gpio2[17]
X3.B50X_GPIO1_9E17uart0_rtsnE17uart0_rtsnuart4_txd_mux1dcan1_rx_mux0I2C1_SCL_mux1spi1_d1_mux0spi1_cs0_mux2pr1_edc_sync1_outgpio1[9]
X3.B51X_GPIO1_8E18uart0_ctsnE18uart0_ctsnuart4_rxd_mux1dcan1_tx_mux0I2C1_SDA_mux1spi1_d0_mux0timer7_mux0pr1_edc_sync0_outgpio1[8]
X3.B54X_MMC0_CMDG18mmc0_cmdG18mmc0_cmdgpmc_a25_mux1uart3_rtsn_mux0uart2_txd_mux2dcan1_rx_mux2pr1_pru0_pru_r30[13]pr1_pru0_pru_r31[13]gpio2[31]
X3.B55X_MMC0_D0G16mmc0_dat0G16mmc0_dat0gpmc_a23_mux1uart5_rtsn_mux0uart3_txd_mux2uart1_rin_mux1pr1_pru0_pru_r30[11]pr1_pru0_pru_r31[11]gpio2[29]
X3.B56X_MMC0_D1G15mmc0_dat1G15mmc0_dat1gpmc_a22_mux1uart5_ctsn_mux0uart3_rxd_mux2uart1_dtrn_mux1pr1_pru0_pru_r30[10]pr1_pru0_pru_r31[10]gpio2[28]
X3.B58X_MMC0_D2F18mmc0_dat2F18mmc0_dat2gpmc_a21_mux1uart4_rtsn_mux0timer6_mux0uart1_dsrn_mux1pr1_pru0_pru_r30[9]pr1_pru0_pru_r31[9]gpio2[27]
X3.B59X_MMC0_D3F17mmc0_dat3F17mmc0_dat3gpmc_a20_mux1uart4_ctsn_mux0timer5_mux0uart1_dcdn_mux1pr1_pru0_pru_r30[8]pr1_pru0_pru_r31[8]gpio2[26]
X3.B60X_UART2_TXL18gmii1_rxclkL18gmii1_rxclkuart2_txd_mux0rgmii1_rclkmmc0_dat6mmc1_dat1_mux1uart1_dsrn_mux0mcasp0_fsx_mux2gpio3[10]
X3.B8X_UART1_CTSD18uart1_ctsnD18uart1_ctsntimer6_mux1dcan0_tx_mux2I2C2_SDA_mux0spi1_cs0_mux0pr1_uart0_cts_n_mux1pr1_edc_latch0_ingpio0[12]
X3.B9X_UART1_RTSD17uart1_rtsnD17uart1_rtsntimer5_mux1dcan0_rx_mux2I2C2_SCL_mux0spi1_cs1_mux0pr1_uart0_rts_n_mux1pr1_edc_latch1_ingpio0[13]
X1.B45X_CLKOUT1A15xdma_event_intr0A15xdma_event_intr0timer4_mux1clkout1spi1_cs1_mux2pr1_pru1_pru_r31[16]EMU2_mux0gpio0[19]
X3.A15X_SPIO0_SCLKA17spi0_sclkA17spi0_sclkuart2_rxd_mux3I2C2_SDA_mux2ehrpwm0A_mux1pr1_uart0_cts_n_mux0pr1_edio_sofEMU2_mux1gpio0[2]
A3testoutA3testout
A4OSC1_OUTA4OSC1_OUT
A6OSC1_INA6OSC1_IN
A9VREFNA9VREFN
B1ddr_a5B1ddr_a5
B2ddr_wenB2ddr_wen
B3ddr_ba2B3ddr_ba2
B4ENZ_KALDO_1P8VB4ENZ_KALDO_1P8V
X3.A30X_PORZ = Global Reset-SignalB5RTC_porzB5RTC_porz
B9VREFPB9VREFP
C1ddr_a9C1ddr_a9
C2ddr_a4C2ddr_a4
C3ddr_a3C3ddr_a3
C4ddr_ba0C4ddr_ba0
C6PMIC_POWER_ENC6PMIC_POWER_EN
D1ddr_nckD1ddr_nck
D2ddr_ckD2ddr_ck
D3ddr_a15D3ddr_a15
D4ddr_a8D4ddr_a8
D5ddr_a6D5ddr_a6
E1ddr_ba1E1ddr_ba1
E2ddr_a7E2ddr_a7
E3ddr_a12E3ddr_a12
E4ddr_a2E4ddr_a2
F1ddr_casnF1ddr_casn
F2ddr_a11F2ddr_a11
F3ddr_a0F3ddr_a0
F4ddr_a10F4ddr_a10
G1ddr_odtG1ddr_odt
X3.B53X_MMC0_CLKG17mmc0_clkG17mmc0_clkgpmc_a24_mux1uart3_ctsn_mux0uart2_rxd_mux2dcan1_tx_mux2pr1_pru0_pru_r30[12]pr1_pru0_pru_r31[12]gpio2[30]
G2ddr_resetnG2ddr_resetn
G3ddr_ckeG3ddr_cke
G4ddr_rasnG4ddr_rasn
H1ddr_a1H1ddr_a1
X1.A18X_RMII_REFCLK/_GPIO0_29 (wenn J5 = 1+2)H18rmii1_refclkH18rmii1_refclkxdma_event_intr2_mux0spi1_cs0_mux1uart5_txd_mux0mcasp1_axr3_mux1mmc0_pow_mux0mcasp1_ahclkx_mux1gpio0[29]
H2ddr_csn0H2ddr_csn0
H3ddr_a13H3ddr_a13
H4ddr_a14H4ddr_a14
J1ddr_d8J1ddr_d8
J2ddr_dqm1J2ddr_dqm1
J3ddr_vtpJ3ddr_vtp
J4ddr_vrefJ4ddr_vref
K1ddr_d9K1ddr_d9
K2ddr_d10K2ddr_d10
K3ddr_d11K3ddr_d11
K4ddr_d12K4ddr_d12
L1ddr_dqs1L1ddr_dqs1
L2ddr_dqsn1L2ddr_dqsn1
L3ddr_d13L3ddr_d13
L4ddr_d14L4ddr_d14
M1ddr_d15M1ddr_d15
M2ddr_dqm0M2ddr_dqm0
M3ddr_d0M3ddr_d0
M4ddr_d1M4ddr_d1
N1ddr_d2N1ddr_d2
N2ddr_d3N2ddr_d3
N3ddr_d4N3ddr_d4
N4ddr_d5N4ddr_d5
P1ddr_dqs0P1ddr_dqs0
X3.B41X_USB0_VBUSP15USB0_VBUSP15USB0_VBUS
P2ddr_dqsn0P2ddr_dqsn0
P3ddr_d6P3ddr_d6
P4ddr_d7P4ddr_d7
X1.B23X_GPMC_WAITT17gpmc_wait0T17gpmc_wait0gmii2_crsgpmc_csn4rmii2_crs_dvmmc1_sdcd_mux0pr1_mii1_coluart4_rxd_mux2gpio0[30]
X3.B22X_USB1_VBUST18USB1_VBUST18USB1_VBUS
U11OSC0_OUTU11OSC0_OUT
X1.A41X_RGMII2_TCLKU15gpmc_a6U15gpmc_a6_mux0gmii2_txclkrgmii2_tclkmmc2_dat4_mux0gpmc_a22_mux0pr1_mii1_rxd2eQEP1_index_mux1gpio1[22]
V10OSC0_INV10OSC0_IN
X3.B46X_LCD_PCLKV5lcd_pclkV5lcd_pclkgpmc_a10_mux1pr1_mii0_crs_mux1pr1_edio_data_in4pr1_edio_data_out4pr1_pru1_pru_r30[10]pr1_pru1_pru_r31[10]gpio2[24]